Supported targets

Generally supported architectures and trace protocols, and a structured feasibility check for one exact target configuration at a time.

Target support is a property of a configuration, not of a core family. Whether a device can be observed depends on the trace source the silicon actually implements, the package and board routing, the sustained trace bandwidth and the analysis mode you need. This page therefore states our general support at the level where a general statement is honest - core architecture and trace protocol - and asks for everything else per exact configuration, in the check below.

Architectures and trace protocols

Support has two levels: the trace infrastructures the hardware receives, and the target configurations with a documented production firmware.

The trace infrastructures, as published in our coverage whitepaper (Table 4):

Architecture	Trace mechanism	Typical interface
Arm^® Cortex^®-A / -R / -M	CoreSight^™ ETM / PFT (PTM)	TPIU (4 to 32 bit) / SWO / HSSTP / PCIe^®
Infineon^® AURIX^™ TriCore^™ (TC3xx / TC4xx)	MCDS	AGBT / DAP
Power Architecture^® (QorIQ^® / MPC5xxx)	Nexus (IEEE-ISTO 5001)	Aurora / PCIe^® / Nexus port
Intel^® x86-64 (selected)	Intel^® PT	PCIe^®
RISC-V^®	N-Trace / E-Trace - the encoder is our own IP: CEDARtools.TraceEncoder	per the implemented standards
… and many more - ask about your exact target

The CEDARbox hardware supports all of these protocols physically, through its trace inputs and the GTI adapter family. Productive coverage firmware exists per documented target configuration - today that covers Arm^® Cortex^®-A class cores, 32- and 64-bit, with CoreSight^™ ETMv4 or PFT/PTM program-flow trace over a parallel trace port (TPIU or Mictor, 16 bit) or PCIe^®, with statement, branch and MC/DC coverage. AURIX^™ task profiling is its own product line - CEDARtools.SmartTrace.

An architecture or protocol that is not named as a production configuration is a question to us, not an answer: it is handled by the same feasibility review as any unlisted configuration. Send the device and trace-connector information, the metric you need, the compiler and the expected operating rate - as much of it as you have. What comes back is the trace-source assumption, the physical path, a bandwidth estimate, the required hardware and the remaining verification steps.