MC/DC stands for Modified Condition/Decision Coverage. The basic idea: it is not enough to see that a decision in the code was true once and false once. MC/DC wants proof that every single condition inside the decision can change the result on its own. Why that matters is easiest to show with the following example. […]
How AI agents turn embedded trace from a last-resort tool into a tireless overnight bug hunter. The Hunt Every embedded engineer has said this sentence – or at least thought it, somewhere around 2 a.m., staring at a system that has been running flawlessly ever since the debugger was attached. The crash is real: roughly […]
Albert Schulz presented “C-Trace — An Open-Source RISC-V® Trace Encoder and its Ecosystem” at this year’s ADTC / EDA Workshop 2026. In the presentation, he introduced C-Trace, Accemic’s open-source, standards-compliant RISC-V® trace encoder developed within the European TRISTAN project. C-Trace addressed a key gap in the RISC-V® ecosystem: a production-grade, standards-based trace encoder enabling non-intrusive […]
Embedded Trace is an integral part of nearly all modern processors. This post summarizes the essential facts about this powerful but still far too seldom used functional unit that application engineers, test engineers and project managers should know in order to test, optimize and debug a system efficiently. Something about Embedded Processor Observation Monitoring embedded […]
You’ve probably heard of CoreSight™ Embedded Trace Macrocell (ETM), Intel® PT, or MIPI® Nexus—they’re built-in hardware features that quietly record what your processor is up to. Unlike software logs or added profiling code, embedded trace – or sometimes called hardware trace or processor trace – is generated in silicon. You don’t slow down your app, […]