About Accemic
A focused team developing trace-based coverage, timing and control-flow analysis for live embedded processors, from microcontrollers to GHz-class SoCs.
Our foundation is technology that already runs: continuous control-flow reconstruction, machine-readable evidence from the optimized executable under test, documented partner integrations and open trace-encoder IP for RISC-V®.
The same foundation is increasingly useful beyond verification. When AI can change an implementation in seconds, live target observation becomes the feedback channel that lets the next iteration start from measured reality rather than another assumption.
CEDARtools.Forge extends that foundation into an independent acceptance loop for AI-assisted development and is currently offered as a guided pilot under NDA.
Where it began
A few years ago we kept hearing the same sentence from developers in automotive and aerospace:
“What we urgently need are tools to observe and analyse our systems over a longer period. We are looking for the cause of errors that happen once every ten hours and we simply cannot find them. Every tool available to us is limited. We cannot just attach a debugger and stop the engine controller - it would break.”
That was the problem we set out to solve. Accemic observes program execution on live processors - from microcontrollers to GHz-class SoCs - through their trace infrastructure, without stopping the target or requiring application-side logging. Where an analysis mode supplements the executable, both the supplement and its measured effect are reported explicitly.
Turning this approach into a practical and reliable solution required several years of development - on a processor-trace foundation Accemic has been building for over twenty years. The result is a technical foundation for observing and analyzing complex embedded systems over extended periods under real operating conditions.
What we have to show for it
Accemic’s technical foundation is documented through granted patents, publications, collaborative research and product measurement records. The evidence section provides the current, itemized ledger for each category.
| Granted patents | Numbers and what they actually cover: patents |
| Publications | With co-authors from Razorcat, AbsInt and the University of Lübeck: publications |
| Research projects | CoCoSI, ARAMiS 2, COEMS, TRISTAN: research projects |
| Documented partner integrations | TESSY and TimeWeaver - each page states the transferred artifacts and the boundary of any assurance claim |
| Documented target configurations | With status shown per entry: supported targets |
| Open source | CEDARtools.TraceEncoder (CTTE), a trace encoder for RISC-V® |
How we work
The headquarters is in Kiefersfelden, on the Austrian border, with development offices elsewhere; we have worked remotely with each other, with our customers and with our development partners for years.
Technical engagements are led directly by the engineers responsible for the relevant trace, target or analysis path. We scope work deliberately and state the supported configuration, measurement boundary and open assurance questions before implementation begins. That also means we say no to things: if your problem is not one our tools actually solve, we would rather tell you than sell you a project.
Working with partners
Accemic works upstream of established test, timing and assurance tools. Partners contribute processors, trace interfaces, analysis environments or market access; Accemic contributes continuous trace processing and the evidence chain from execution to reviewable result. The current integrations and their boundaries are on the integrations page.
Quality policy
Continuous improvement through innovation and customer feedback. Error avoidance over error detection. Conformity with the relevant standards and specifications. The full policy
CEDARtools® is a registered trademark of Accemic Technologies GmbH.