The measurement of test coverage (statement coverage, branch coverage, MC/DC, data coverage) often requires a comprehensive software instrumentation of the program code. This implies an unfaithfully slowed down program execution and an increased memory footprint.
With CEDARtools®, Accemic Technologies now offers a patented solution to attain a comprehensive analysis and documentation of the test coverage on the basis of non-instrumented release code. As the test and certification overhead is factored out by our monitoring solution, it is no longer required to be carried into the final products. They are streamlined in compute and memory demands and can be produced at a lower cost.
The absence of the SW instrumentation now also enables the test coverage to be measured during the execution of integration and system tests, thus demonstrating the completeness of these tests.
Furthermore, the test coverage measured during the execution of integration tests and system tests can be used to substitute structural unit tests accordingly.
CEDARtools® advantages for structural tests:
(A) Measurable statement of the completeness of high level tests
(B) Substitution of structural module tests by structural high level tests
The execution of functional tests also requires the device under test (DUT) to be fully observable. Especially when monitoring non-functional requirements (execution and response times, WCET, WCRT), it is of particular advantage to have an arbitrary time of observation available without influencing the operation of the DUT.
With CEDARtools®, Accemic Technologies now offers a new method to run these functional tests without software instrumentation directly on the release code. During the continuous reconstruction of the control flow, it is possible to mark certain instruction addresses. When these instructions are executed, elements are injected into the emitted event stream, which is examined on-the-fly for specified temporal properties. The used event processing units are configured in the high-level language TeSSLa. A large number of temporal properties can be monitored in parallel. The TeSSLa macro support enables the easy adoption of industry standards like AUTOSAR TIMEX or AMALTHEA to describe temporal behavior. The CEDARtools® solution leverages event processing units that execute low-level TeSSLa operators natively. They are merely re-programmed for a any given monitoring task. A time-consuming, application-specific synthesis of FPGA logic is not required.
Thus, a change of the high-level property description can be applied to a trace data stream within seconds.
Summarized, this is a major step forward for the effective execution and monitoring of requirements-based tests.
As the number of features and demands in modern embedded systems grows, the overall number of code lines in those projects and their complexity increases. To satisfy the demand for more computational power, multi-core processors have been gaining more and more interest both in the automotive and the avionic industries. Although they allow for more powerful, higher-integrated and cost-effective implementations, they also increase the level of complexity in software development and the chances of the occurrence of complex transient failures, such as data races, deadlocks or resource starvation. Another more colloquial description may be sporadic failures that only occur under certain circumstances that are typically hard to reproduce and comprehend.
The following requirements for efficient multi-core debug tools have been derived:
- A deep system insight is required, being able to notice any unusual behavior and react on that.
- Non-instrusiveness: A fundamental claim is that a tool does not change the behavior of the system under test during observation.
- A decoupling of the observation tool from the developed software also avoids the need for changes in the code so that the observation can be conducted on the actual release code.
- Long observation period: Issues under observation tend to happen very rarely in time. Hence, observation should not be restricted to a few seconds or minutes but should preferably be unlimited in time.
- Multiple focuses: Debugging efficiency can be highly increased by the ability to analyze multiple independent failures in parallel due to the low occurrence rate of each single failure.
- Multi-core support: The tool should be able to debug parallel software running on multi-core processors with the aim of being able to catch failures introduced by this architecture.
- Autonomous operation: Once armed, the tool should operate autonomously so that it can be used for long test runs in the real system environment where physical access might not be possible.
- Cost effectiveness: The debugging equipment and the overall debug process has to be in proportion with the cost of the bug fixed in order to be applied sustainably in an industrial environment.
- Adaptability: The tool should be rapidly adaptable in terms of the observation focus.
CEDARtools®, a new technology for monitoring embedded systems non-intrusively over an unlimited time frame, fulfils the above requirements for an efficient multi-core debug tool.
CEDARtools® is a game changer for the debugging process, particularly for complex non-deterministic error patterns.